1. Field of the Invention
The invention relates to integrated electronic circuitry, specifically array based application specific integrated circuits (ASICs).
2. Description of the Related Art
An array based application specific integrated circuit (ASIC) as known in the electronics industry is a semiconductor device with tens of thousands to hundreds of thousands of transistors on a single chip that may be interconnected through several metallization layers according to customer specifications.
Array based ASICs offer high logic density and fast customized implementation of a customer's logic due to the few number of masks required. As such, array based ASICs have moderate costs and turnarounds, especially when design changes and enhancements are so predominant in the electronics industry.
However, array based ASICs have several drawbacks. Typically, although ASICs have hundreds of inputs and outputs and sometimes hundreds of thousands of transistors, a significant percentage of the transistors and many of the inputs and outputs are unused in the final design. This waste can be substantial in the face of large scale production.
Some array based ASICs are processed to achieve but one function. Besides the probable waste of transistors, inputs and outputs, such devices suffer from inventory risks. If the particular array based ASIC with a given function becomes obsolete, a manufacturer would be unable to utilize its large inventory. Furthermore, mistakes in processing reduce the yield of a single function array based ASIC forcing the manufacturer to scrap the die.
Other array based ASICs are processed to achieve several functions. Such ASICs suffer from high non-recurring engineering charges (NRE). This is because the design of masks to interrelate the functions and the transistors on the chip is a time intensive process. Such ASICs thus suffer from design risks. The higher the complexity of the interrelationships among the functions and transistors, the greater time and effort is required for modifications and enhancements. In addition, the yield suffers considerably more than for a single function ASIC. The waste is accentuated since a few nonworking transistors can disable all the functions of the array based ASIC since they are interrelated in function and the sharing of transistors.